As semiconductor device sizes have decreased, the density of devices on a chip (or die) has increased, along with the size of the chip, making chip bonding more difficult. Wafer bumping is replacing wire bonding as the interconnection of choice for a growing number of circuits due to lower inductance. The broad term “wafer bumping” is defined as the process by which solder (e.g. a solder alloy), gold, copper, or other metal bumps or balls, is applied onto to the devices at the wafer level to be in connection (e.g., via a redirect layer) with or on the contact pads (or bonding pads). There can be an under bump metallization (UBM) layer between the pads and solder balls.
In a flip-chip configuration, the solder balls are used to make many connections to package substrates (e.g., polymer substrate or a printed circuit board (PCB)), where the chip is inverted and attached onto a package substrate via the solder balls. Since the solder balls can form an area array (a “ball grid array” (BGA)), this arrangement provides a high-density for chip interconnections.
Wafer backgrinding, sometimes referred to as wafer thinning or wafer backlapping, is a post-fabrication semiconductor process by which the thickness of a semiconductor wafer is reduced by grinding down the backside of the wafer. The backgrinding process is applied to the backside of the wafer before singulation and packaging to reduce the thickness of the device which also improves the die's thermal properties. After the solder balls are formed on the active top side surface of the chips, a protective adhesive backgrind tape is applied over the top side surface of the wafer.
Organic-adhesive backgrind tapes are commonly used to secure and protect the bumps during wafer backgrinding processing. During backgrinding the wafer is held by a chuck table that has a porous center chuck portion which allows applying a suction to the taped top side surface of the wafer so that the tape protects the bumps from the chuck table. Using a backgrind apparatus, the backside of the wafer is ground to a predetermined thickness (e.g., 100 μm to 200 μm), followed by de-taping, typically cleaning, singulation (dicing), and then bonding the chip to the package substrate.